whoami

1st year Ph.D EE student at the Georgia Institute of Technology in the GTCAD lab under the supervision of Dr. Sung-Kyu Lim. Concentrating in VLSI and Computer Engineering, and specializing in EDA for digital design. Currently studying Back-Side Power Delivery Network (BS-PDN) design, analyses, and EDA flow with 3nm technology for system-level effects on GPUs and CPUs. Strongly interested in researching low-power machine learning accelerator architectures for 3D IC design, and novel EDA methodologies for improving PPA and IR-drop.

ls publications/

Towards a Markerless 3D Pose Estimation Tool

Amaan Rahman, Mili Shah, Ya-Shian Li-Baboud, Ann Virts

Presented at the SIGCHI Conference in Hamburg, Germany.

Evaluation Methods and Measurement Challenges for Industrial Exoskeletons

Li-Baboud, Ya-Shian, Ann Virts, Roger Bostelman, Soocheol Yoon, Amaan Rahman, Lucia Rhode, Nishat Ahmed, and Mili Shah

ls showcase/

3D Pose Evaluator Tool

3D human pose estimation evaluator tool composed of 3 algorithms: GAST-Net, VIBE, and Blazepose. Algorithms are evaluated on Optical Tracking System (OTS) data and metrics utilized are MPJPE and PJD. The tool is pipelined to later be utilized for exoskeleton kinematic evaluations.

Understanding Vision Transformers with Probing Techniques

Proposed a method of analyzing a vision transformer through probing techniques to gauge the classification performance of each layer in the ViT except the classification head. Also performed a comparison study between a ViT and a naive adaptation of a convolution model to determine the significance of encoders and patch encoding.

3D Human Pose Estimation on Computer Animations

Utilized 2D human pose estimation algorithm, Openpose, to triangulate 3D positional information with stereophotogrammatry in real-time. Applied research to computer animations to work on low-cost alternative to body tracking using 2 RGB cameras.

Deep Learning Projects

Developed multilayer perceptrons (MLP), Convolutional Neural Networks (CNN), residual networks, and transformers with Tensorflow.

Bayesian Machine Learning Projects

Various projects implemented Bayesion machine learning algorithms and techniques such as kernel methods, Expextation-Maximization, Monte Carlo Markov Chain.

Data Structures & Algorithms II Projects

Implemented various data structures in C++ such as hash tables, heaps, Djikstra's algorithm, and dynamic programming.

Interrupt Controller

Developed interrupt controller with Verilog. Synthesized with DC Compiler; designed floorplan and placement, clock, routing optimizations with IC Compiler II; passed DRC checks.

8-bit Counter

Developed 8-bit counter with Verilog. Synthesized counter with DC Compiler; designed floorplan and placement, clock, routing optimizations with IC Compiler II; passed DRC and LVS checks.

C Compiler

Developed C compiler from scratch. Composed of 5 stages: Lexical Analyzer, Syntax Parser, Semantic Analyzer, Intermediate Code Generator, Target Code Generator.